1. Field of the Invention
This invention generally relates to integrated circuit fabrication and, more particularly, to a thermal sensor made with a silicon/germanium (Si/Ge) superlattice, and a corresponding fabrication process.
2. Description of the Related Art
In a thermal imager, the incident infrared (IR) light is detected by an induced increase in sensor temperature. A thermal sensor uses a material with a temperature-dependent resistance to measure this heating effect. Resistive materials with a high value of the temperature coefficient of resistance (TCR), such as vanadium oxide, have been used for this application. Other materials include metals such as titanium, platinum, nickel, niobium, nickel-iron, chromium, aluminum, etc., and semiconductor materials such as germanium, silicon/germanium, and amorphous silicon. These materials can be fabricated into microbridges, with cavities formed by micromachining underneath the microbridges, to increase thermal sensitivity. That is, the microbridge structures make the sensor more responsive to light-induced thermal changes.
Thin films of mixed vanadium oxides (VOx) can be used to fabricate a microbolometer with a two-level design that permits readout circuitry (ROIC) be placed in the Si substrate underneath the microbridge. Fabrication begins with implantation of the readout electronics and conducting metallizations in the Si wafer. For example, a MOSFET or diode is fabricated in the substrate to generate an electrical signal responsive to temperature. The wafer is then planarized with a material, such as spun-on polyimide, which can be photolithographically patterned to form sacrificial mesa. Silicon nitride layers are sputtered over the sacrificial mesas, together with TCR material and connecting metallizations. Then the sacrificial mesas are removed by a material-selective etch to leave a self-supporting two-level structure.
Although materials such as VOx has been used successfully in microbolometer thermal imager applications, the deposition of low-noise VOx material on foundry CMOS wafers is still a challenge. The optimum deposition process remains impractical due to the tight oxygen content control needed. Mass-market thermal imaging applications, such as automotive night vision for example, require a far lower-cost solution than can be achieved using VOx microbolometers.
Polycrystalline SiGe is a promising material because of its low thermal conductance, high TCR, and moderate noise level, combined with a low stress suitable for surface micromachining. This choice of materials is benefited by the fact that SiGe is a CMOS front-end material used in BiCMOS and strained CMOS processes, and its process modules are available in IC foundries. However, the deposition of polycrystalline SiGe and the subsequent annealing requires a high temperature that is not compatible with conventional CMOS post-processes. Therefore, conventional polycrystalline SiGe microbolometers must be made as hybrid sensors, where the polycrystalline SiGe microbolometers are integrated into temperature-sensitive readout circuits by multiple-chip-module technology. After the completion of wafer processing, two substrates, one with microbolometer and the other with readout circuit, are prebonded in a flip-chip aligner. Then, the cavity is evacuated in a reflow oven, and later reflown at around 240° C., resulting in an eutectic solder bond rim sealing which becomes a hermetic micropackage. The disadvantage of the hybrid design is discussed below.
The responsivity of a resistive bolometer is directly proportional to the TCR, and inversely proportional to the thermal conductance associated with the principal heat loss mechanism. Both parameters are important. However, for IR resistive bolometers, values of thermal conductance can range over several orders of magnitude, whereas the range of possible values of TCR is far less. Therefore, the choice of resistive material is really of secondary importance. The primary focus should be on the thermal isolation structure. Thermal isolation is the key to building high-performance thermal detectors.
In a monolithic design approach, responsivity can be maximized by optimizing the design of the “legs” that support, the thermal element, to control the heat flow (heat loss) from the element to the substrate. In the hybrid approach, the heat flow down to the substrate cannot be easily controlled. In considering an array of sensors, thermal spreading of the image becomes an issue, resulting from the non-ideal isolation of each pixel from its neighbor.
As noted above, one advantage to the hybrid approach is that the elements are separately prepared before bump-bonding to the substrate, which eases process compatibility issues. For a polycrystalline SiGe hybrid sensor, there is no restriction on the process temperature for film deposition or annealing. In the monolithic approach, the fabrication processes are restricted by the thermal limitation of the most temperature sensitive part, which is typically the readout circuit. Typically, the temperature limit can be as low as 400° C. to 450° C., to protect the integrity of the metallization wiring.
SiGe is another material that has thermoelectric applications. It has a high figure-of-merit due to its poor thermal conductivity, and reasonably good electrical conductivity when doped. When Si and Ge are formed in a superlattice structure, further reductions in thermal conductivity can be obtained, while maintaining good electrical conductivity. SiGe quantum dot superlattices and SiGe thin-film (quantum well) superlattices are known. There are two characteristics that differentiate SiGe superlattices from bulk SiGe: the existence of many interfaces, and the periodicity in the structure. The reduced thermal conductance of superlattices is mainly due to the structure's effect on phonon transport of these nanostructures, through the anisotropy of the structure, the phonon spectrum change, and the interface scattering.
As noted above, the choice of resistive material is of secondary importance when compared to the thermal isolation structure. Therefore, it can be very advantageous to apply a SiGe superlattice structure to IR thermal imager applications, to minimize the thermal conductance. However, there are several obstacles preventing the use of a SiGe superlattice for thermal sensor applications.
With respect to the monolithic approach, the high temperatures associated with the fabrication of a SiGe superlattice, prevent the superlattice from being integrated with the readout circuitry on a single substrate. However, in the hybrid approach, the complication of package and chip bonding limit the application of SiGe superlattices to wafer-scale fabrication processes.
In order to fabricate a two-level microbolometer, readout circuits are fabricated on the silicon substrate underneath the thermal sensor element, to maximize the fill factor. The SiGe superlattice structure in the sensor element requires a single-crystal Si substrate to achieve the proper crystallinity, and these high-temperature processes rule out the possibility of fabricating the readout circuits on the same substrate. It is certainly feasible to fabricate Si/Ge superlattice structures on a second wafer, and transfer to the wafer with readout devices. However, difficulties occur after wafer transfer in the removal of the remaining Si from the SiGe superlattice structure. This is a problem, no matter whether the separation is by smart-cut wafer splitting, or by backside grinding and polishing.
To achieve high sensitivity, it is necessary to isolate the thermal element (SiGe superlattice) by generating a cavity under the element. The problem is how to form the cavity without removing the SiGe films.
It would be advantageous if the advantages of both the monolithic and hybrid design approaches could be used to fabricate a thermal sensor with a SiGe superlattice thermal sensing element.